The present disclosure relates to high voltage-resistant semiconductor devices and methods of manufacturing high voltage-resistant semiconductor devices. In particular, the present disclosure relates to high voltage-resistant semiconductor devices into which a plurality of transistors is integrated and methods of manufacturing such high voltage-resistant semiconductor devices.
In recent years, semiconductor devices such as a LSI (large scale integration) systems placing together a digital circuit and an analog circuit on one chip have been put to practical use. In these semiconductor devices, since digital circuits (in which a reduction of leak currents during non-conduction is a consideration) and analog circuits (in which current driving capability is a consideration) are placed together, the threshold voltage (Vt) at which a transistor starts to become conductive may be changed.
Methods for adjusting the threshold voltage include adjusting the impurity concentration of a channel region (a diffusion region) in a transistor, adjusting a distance between a channel layer and a gate electrode (for example, see Japanese Patent Application Laid-Open No. 1997-36061, which is incorporated by reference), and adjusting the gate length of a transistor (for example, see Japanese Patent Application Laid-Open No. 2005-38958, which is incorporated by reference).
In addition, Japanese Patent Application No. 2006-305991 (incorporated by reference) discloses that a diode may be separately provided in order to restrain a variation of the Vt caused by plasma damage to the gate insulating film. However, in that device, all transistors have the same degree of Vt, and a semiconductor device having transistors showing different Vts is not assumed.